2016-12-02

VLSI Data Conversion Circuits by Shanthi Pavan (IIT Madras)

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source: nptelhrd     2012年7月23日
Electronics - VLSI Data Conversion Circuits by Dr. Shanthi Pavan, Department of Electrical Engineering, IIT Madras. For more details on NPTEL visit http://nptel.iitm.ac.in

01 Introduction to Data Conversion 1:25:33
02 Sampling-1 1:08:10
03 Sampling-2 55:55
04 Nonidealities in Samples 54:19
05 Noise due to Sampling 57:58
06 Distortion in a Sampling Switch 59:51
07 Gate Boosted Switches-1 52:25
08 Gate Boosted Switches-2 55:06
09 Charge Injection 52:47
10 S/H Characterization - 1 51:29
11 S/H Characterization - 2 55:27
12 FFTs and Leakage 51:08
13 Spectral Windows - 1 51:19
14 Spectral Windows-2 54:21
15 ADC/DAC Definitions 49:57
16 Quantization Noise - I 51:25
17 Quantization Noise -2 57:58
18 Oversampling & Noise Shaping 53:45
19 Delta-Sigma Modulation - 1 53:27
20 Delta-Sigma Modulation - 2 53:52
21 Linearized Analysis 58:26
22 Stability of Delta Sigma Modulators 51:58
23 High Order DSMs 52:27
24 NTF Design and Tradeoffs 55:44
25 Single bit Modulators 50:10
26 Loop Filter Architectures 52:47
27 Continous-time Delta Sigma Modulation 54:19
28 Implicit Antialiasing 53:38
29 Modulators with NRZ and Impulsive DACs 55:25
30 High Order CTDSMs 50:21
31 CTDM Design 50:09
32 Excess Loop Delay (ELD) 48:52
33 ELD Compensation 52:51
34 Effect of Clock Jitter on CTDSMs - 1 49:54
35 Effect of Clock Jitter on CTDSMs - 2 52:25
36 Dynamic Range Scaling 52:39
37 Simulation of CTDSMs 52:17
38 Integrator Design-1 54:59
39 Integrator Design-2 1:01:10
40 Flash ADC Design 50:11
41 Latches and Metastability 56:19
42 Offset in a Latch-1 51:00
43 Offset in a Latch-2 Auto Zeroing 54:07
44 Auto Zeroing-2 56:48
45 Auto Zeroing-3 53:08
46 Autozeroing in Flash ADCs 57:34
47 Flash ADC Case Study 56:43
48 Flash ADC Case Study 1:04:22
49 Flash ADC in a Delta Sigma Loop 49:15
50 DAC Basics 53:00
51 Binary and Thermometer DACs 53:57
52 Segmented DACs 41:41
53 Optimal DAC Segmentation 54:07
54 DAC Nonlinearities 52:00
55 Current Steering DACs-1 55:46
56 Current Steering DACs-2 58:56
57 DAC Mismatches in DSMs 54:04
58 Calibration and Randomization 54:33
59 Dynamic Element Matching-1 53:27
60 Dynamic Element Matching-2 50:05

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