Onur Mutlu: Computer Architecture (MediaTech version)--Carnegie Mellon U, Spring 2014

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source: Carnegie Mellon Computer Architecture    2014年1月20日
Spring 2014 (MediaTech) -- Computer Arch. -- Carnegie Mellon
Lecturer: Prof. Onur Mutlu (http://users.ece.cmu.edu/~omutlu/)
Course webpage: http://www.ece.cmu.edu/~ece447/s14/do...
Module materials: http://www.ece.cmu.edu/~ece447/s14/do...

Lecture 1. Introduction and Basics 1:41:43
Lecture 2. Fundamental Concepts and ISA 1:43:22
Lecture 3. ISA Tradeoffs 1:44:47
Lecture 4. ISA Tradeoffs (cont.) 1:44:32
Lecture 5. Single-Cycle and Multi-Cycle uArch 1:25:19
Lecture 6. Multi-Cycle and Microprogrammed uArch 1:44:52
Lecture 7. Pipelining 1:36:14
Lecture 8. Data and Control Dependence 1:39:26
Lecture 9. Branch Handling and Branch Prediction 1:38:02
Lecture 10. Branch Handling & Branch Prediction II 1:39:04
Lecture 11. Precise Exceptions 1:38:52
Lecture 12. Virtual Memory I 1:25:15
Lecture 13. Virtual Memory II 1:05:07
Lecture 14. Out-of-order Execution 1:43:48
Lecture 15. Load/Store Handling and Data Flow 1:26:15
Lecture 16. SIMD Processing (Vector Processors) 1:38:57
Lecture 17. GPUs, VLIW, Systolic Arrays 1:40:57
Exam I Review 1:29:31
Lecture 19. Memory Hierarchy and Caches 1:39:18
Lecture 20. Better Caching 1:32:11
Lecture 21. Advanced Caching and MLP 1:35:33
Lecture 22. Main Memory 1:41:13
Lecture 23. New DRAM Architectures 1:12:56
Lecture 24. Memory Scheduling 1:41:40
Lecture 25. Main Memory Wrap-Up 1:42:04
Lecture 26. Runahead Execution 1:37:52
Lecture 27. Prefetching 1:43:03
Lecture 28. Multiprocessors 1:35:00
Lecture 29. Consistency & Coherence 1:45:52
Lecture 30. Performance Predictability and Cache Compression 1:39:39
Lecture 31. Interconnection Networks 1:42:18
Lecture 32. Asymmetric Multi-Core 1:38:10
Lecture 33. Emerging Memory Tech. 1:32:46