VLSI Design by Nandita Dasgupta (IIT Madras)

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source: nptelhrd    2009年1月11日
Electronics - VLSI Design by Dr. Nandita Dasgupta, Department of Electrical Engineering, IIT Madras.

Lecture - 1 Introduction on VLSI Design 49:02
Lecture - 2 Bipolar Junction Transistor Fabrication 48:48
Lecture - 3 MOSFET Fabrication for IC 50:13
Lecture - 4 Crystal Structure of Si 50:47
Lecture - 5 Crystal Structure contd 47:57
Lecture - 6 Defects in Crystal + Crystal growth 49:17
Lecture - 7 Crystal growth Contd + Epitaxy I 50:33
Lecture - 8 Epitaxy II - Vapour phase Epitaxy 52:33
Lecture - 9 Epitaxy III - Doping during Epitaxy 43:02
Lecture - 10 Molecular beam Epitaxy 48:22
Lecture - 11 Oxidation I - Kinetics of Oxidation 51:46
Lecture - 12 Oxidation II Oxidation rate constants 51:42
Lecture - 13 Oxidation III - Dopant Redistribution 50:37
Lecture - 14 Oxidation IV - Oxide Charges 44:14
Lecture - 15 Diffusion I - Theory of Diffusion 53:50
Lecture - 16 Diffusion II - Infinite Source 42:53
Lecture - 17 Diffusion III - Actual Doping Profiles 52:10
Lecture - 18 Diffusion IV Diffusion Systems 54:30
Lecture - 19 Ion - Implantation Process 54:54
Lecture - 20 Ion - Implantation Process 51:25
Lecture - 21 Annealing of Damages 51:48
Lecture - 22 Masking during Implantation 53:02
Lecture - 23 Lithography - I 52:43
Lecture - 24 Lithography - II 38:55
Lecture - 25 Wet Chemical Etching 54:10
Lecture - 26 Dry Etching 52:03
Lecture - 27 Plasma Etching Systems 51:59
Lecture - 28 Etching of Si,Sio2,SiN and other materials 52:11
Lecture - 29 Plasma Deposition Process 50:49
Lecture - 30 Metalization - I 50:44
Lecture - 31 Problems in Aluminium Metal contacts 49:00
Lecture - 32 IC BJT - From junction isolation to LOCOS 41:45
Lecture - 33 Problems in LOCOS + Trench isolation 54:34
Lecture - 34 More about BJT Fabrication and Realization 51:04
Lecture - 35 Circuits + Transistors in ECL Circuits 48:04
Lecture - 36 MOSFET I - Metal gate vs Self-aligned Poly-gate 56:36
Lecture - 37 MOSFET II Tailoring of Device Parameters 51:20
Lecture - 38 CMOS Technology 50:06
Lecture - 39 Latch - up in CMOS 40:37
Lecture - 40 BICMOS Technology 44:16

Electronics - Advanced VLSI Design (IIT Bombay)

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source: nptelhrd     2016年2月29日
Advanced VLSI Design by Prof. A. N. Chandorkar, Prof. D. K. Sharma, Prof. Sachin Patkar, Prof. Virendra Singh, Department of Electrical Engineering, IIT Bombay. For more details on NPTEL visit http://nptel.ac.in

Lec-01 Historical Perspective and Future Trends in CMOS VLSI Circuit and System Design 53:45
Lec-02 Historical Perspective and Future Trends in CMOS VLSI Circuit -Part II 1:42:53
Lec-03 Logical Effort - A way of Designing Fast CMOS Circuits 1:06:25
Lec-04 Logical Effort - A way of Designing Fast CMOS Circuits continued 1:12:51
Lec-05 Logical Effort - A way of Designing Fast CMOS Circuits -Part III 1:15:58
Lec-06 Power Estimation and Control in CMOS VLSI circuits 1:00:01
Lec-07 Power Estimation and Control in CMOS VLSI circuits continued 1:19:02
Lec-08 Low Power Design Techniques 54:28
Lec-09 Low Power Design Techniques -Part II 1:51:51
Lec-10 Arithmetic Implementation Strategies for VLSI 57:04
Lec-11 Arithmetic Implementation Strategies for VLSI -Part II 59:15
Lec-12 Arithmetic Implementation Strategies for VLSI -Part III 1:49:15
Lec-13 Arithmetic Implementation Strategies for VLSI -Part IV 1:35:43
Lec-14 Interconnect aware design: Impact of scaling, buffer insertion and inductive peaking 53:38
Lec-15 Interconnect aware design: Low swing and Current Mod-e signaling 53:49
Lec-16 Interconnect aware design: capacitively coupled interconnects 49:50
Lec-17 Introduction to Hardware Description Languages 51:12
Lec-18 Managing concurrency and time in Hardware Description Languages 53:48
Lec-19 Introduction to VHDL 52:27
Lec-20 Basic Components in VHDL 51:26
Lec-21 Structural Description in VHDL 52:54
Lec-22 Behavioral Description in VHDL 51:10
Lec-23 Introduction to Verilog 55:16
Lec-24 FSM + datapath (GCD example) 58:46
Lec-25 FSM + datapath (continued) 54:42
Lec-26 Single Cycle MMIPS 1:11:28
Lec-27 Multicycle MMIPS 1:16:24
Lec-28 Multicycle MMIPS â FSM 1:21:43
Lec-29 Brief Overview of Basic VLSI design Automation Concepts 1:01:05
Lec-30 Netlist and System Partitioning 1:02:49
Lec-31 Timing Analysis in the context of Physical design Automation 1:05:22
Lec-32 Placement algorithm 48:58
Lec-33 Introduction to VLSI Testing 56:09
Lec-34 VLSI Test Basics - I 59:39
Lec-35 VLSI Test Basics - II 58:16
Lec-36 VLSI Testing: Automatic Test Pattern Generation 55:28
Lec-37 VLSI Testing: design for Test (DFT) 56:36
Lec-38 VLSI Testing: Built-in Self-Test (BIST) 58:14
Lec-39 VLSI design Verification: An Introduction 54:21
Lec-40 VLSI design Verification: An Introduction 52:31
Lec-41 VLSI design Verification: Equivalence/Model Checking 50:21
Lec-42 VLSI design Verification: Model Checking 1:00:26