Computer Architecture (Spring 2015) by Onur Mutlu at Carnegie Mellon U)

# click the upper-left icon to select videos from the playlist

source: Carnegie Mellon Computer Architecture    2015年1月21日
Lectures delivered by Professor Onur Mutlu in the Carnegie Mellon University Undergraduate Computer Architecture Class (18-447) during Spring 2015.
Class schedule and lecture slides: http://www.ece.cmu.edu/~ece447/s15/doku.php?id=schedule
Class website: http://www.ece.cmu.edu/~ece447/s15/doku.php
Lecturer: Prof. Onur Mutlu (http://users.ece.cmu.edu/~omutlu/)
Course webpage: http://www.ece.cmu.edu/~ece447/s15/do...
Module materials: http://www.ece.cmu.edu/~ece447/s15/do...

Lecture 1. Introduction and Basics 1:54:36
Lecture 2. Fundamental Concepts and ISA 1:50:17
Lecture 3. ISA Tradeoffs 1:51:11
Lecture 4. ISA Tradeoffs & MIPS ISA 1:30:29
Review Session 1 29:31
Lecture 5. Intro to Microarchitecture 1:47:05
Lecture 6. Microarchitecture II 1:48:13
Lecture 7. Pipelining 1:43:17
Lecture 8. Pipelining II: Data and Control Dependence Handling 1:51:54
Lecture 9. Branch Prediction I 1:51:57
Lecture 10. Branch Prediction II 1:35:28
Review Session 2 1:08:10
Lecture 11. Precise Exceptions, State Maintenance/Recovery 1:53:47
Lecture 12. Out of Order Execution 1:46:41
Lecture 13. Out of Order Execution II and Data Flow 1:40:51
Lecture 14. SIMD (Vector Processors) 1:47:36
Lecture 15. GPUs, VLIW, Execution Models 1:48:38
Lecture 16. Static Instruction Scheduling 1:41:18
Lecture 17. Memory Hierarchy and Caches 1:09:54
Lecture 18. Caches 1:48:28
Lecture 19. High Performance Caches 1:39:40
Lecture 20. Virtual Memory 1:44:50
Recitation 3 1:14:56
Midterm 1 Review 1:22:25
Lecture 21: Main Memory and the DRAM System 1:29:02
Lecture 22: Memory Controllers 1:45:39
Lecture 23: Memory Management 1:48:55
Lecture 24: Simulation & Memory Latency Tolerance 1:45:04
Lecture 25: Prefetching 1:43:15
Lecture 26. More Prefetching and Emerging Memory Technologies 1:56:09
Lecture 27. Multiprocessors 1:37:29
Lecture 28. Memory Consistency and Cache Coherence 1:44:32
Lecture 29. Cache Coherence 1:30:12
Lecture 30. In-memory Processing 1:24:35
Lecture 31. Predictable Performance 1:31:59
Lecture 32. Heterogeneous Systems 1:49:11
Midterm 2 Review 1:39:00
Lecture 33. Interconnection Networks 1:45:15
Final Review Session 1:46:47