Electronics - Advanced Logic Synthesis

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source: nptelhrd    2015年6月16日
Electronics - Advanced Logic Synthesis by Dhiraj Taneja, Broadcom, Hyderabad. For more details on NPTEL visit http://nptel.ac.in

Mod-01 Lec-01 MOS Transistor 39:46
mod01lec02 MOS Transistor - Detailed Study 1:26:36
Mod-02 Lec-03 Combinational Circuits & layout 1:04:30
Mod-02 Lec-04 Delay 1:05:25
Mod-02 Lec-05 Sequential Circuits 1:01:14
Mod-02 Lec-06 Logical Effort 59:37
Mod-02 Lec-07 Circuit Families 58:02
Mod-03 Lab-1 53:58
Mod-03 Lab-2 1:01:45
Mod-03 Lab-3 1:01:47
Mod-03 Lab-4 1:22:34
Mod-03 Lec-08 Introduction to Synthesis 53:57
Mod-03 Lec-09 Libraries 1:58:45
Mod-03 Lec-10 RTL Coding for Synthesis 56:29
Mod-03 Lec-11 Reading Design in DC 1:01:23
Mod-03 Lec-12 Design Environment 59:25
Mod-03 Lec-13 Design Constraints 1:00:39
Mod-03 Lec-14 Compile Flow and stratergies 1:07:04
Mod-03 Lec-15 Analysis and Reporting 56:51
Mod-04 Lab-5 57:40
Mod-04 Lec-16 Advanced Synthesis Techniques 54:19
Mod-04 Lec-17 Datapath Extraction Guidelines 54:10
Mod-04 Lec-18 Power - Methodology and Analysis 1:36:57
Mod-05 Lab-6 58:25
Mod-05 Lab-7 1:38:26
Mod-05 Lab-8 1:09:25
Mod-05 Lab-9 56:17
Mod-05 Lec-19 Static Timing Analysis - Concepts and Flow 1:19:05
Mod-05 Lec-20 Interconnects and Delay calculation 1:02:20
Mod-05 Lec-21 Clock and Exceptions 1:30:44
Mod-05 Lec-22 On Chip Variation 1:00:27
Mod-05 Lec-23 Introduction to Crosstalk 1:00:13
Mod-05 Lec-24 Gaussian / Normal Distribution 47:56
Mod-05 Lec-25 Equivalence Checking / Formal Verification 1:18:48

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